Research Projects

An overview of current research projects in the ESL is given below.

Here are the recently completed research projects conducted by the group.

Design and Implementation of Safety-Critical Control and Monitoring Systems

Qiang Huang, Michael Short and Michael Pont

Funded by: The Leverhulme Trust

This three-year programme builds on the results of a number of recent research projects which have been carried out in the Embedded Systems Laboratory (ESL) at the University of Leicester. These projects have resulted in a development of a comprehensive "pattern language" that supports the development of reliable software for a range of embedded systems (such as automotive and aerospace designs) where reliability is a key design consideration. The main aim of the present research programme is to design and implement a realistic and representative hardware testbed. This testbed will then be used to assess and compare different (software) architectures for use in distributed embedded systems (DESs).

An investigation into the link between software architecture and power consumption in embedded systems

Teera Phatrapornnant and Michael Pont

Funding: Government of Thailand.

Many of the previous projects in the Embedded Systems Laboratory have examined the link between software architecture and reliability. This project marks the start of an important new stream of work in which the links between software architecture and power consumption are being explored in detail.

The main questions being explored in this study are:

• Under what circumstances does the use of time-triggered, co-operatively scheduled (TTCS) software architectures lead to lower power consumption than alternative system architectures (such as event-triggered architectures)?
• Under what circumstances does the use of event-triggered software architectures lead to lower power consumption than alternative system architectures (such as TTCS architectures)?
• Given a desire for minimal power consumption, can we determine the most appropriate software architecture for a given application?

Design and implementation of control systems using embedded processors with severe resource constraints

Simon Key and Michael Pont

Funding: EPSRC.

Development and Assessment of a tool to support the design and implementation of time-triggered embedded systems

Chisanga Mwelwa (University of Leicester)
David Ward (MIRA Ltd)
Anthony Baxendale(MIRA Ltd)
Michael Pont (University of Leicester)

Funded by: EPSRC and MIRA Ltd

September 2002 - August 2005.

This project involves the development and assessment of a tool intended to support the development of embedded systems based on a time-triggered, co-operatively scheduled (TTCS) architecture.

Most studies suggest that systems implemented using TTCS architectures have more predictable behaviour than those implemented using alternative architectures (such as those which are event-triggered and / or pre-emptively scheduled). Set against this is the fact that the creation of TTCS architectures requires careful design and implementation if the theoretically-predicted improvements in system reliability are to be realised in practice.

To support the design of TTCS systems, a complete pattern language has been developed at the University of Leicester (see: Pont, M.J., 2001, "Patterns for Time-Triggered Embedded Systems", Addison-Wesley). This pattern language is intended to allow TTCS architectures to be simply and cost-effectively applied in a wide range of embedded projects.

In previous studies, these patterns have been used 'by hand': in the present study, a tool will be developed to support the development of TTCS embedded systems. The effectiveness of the tool will then be rigorously assessed by means of appropriate user trials conducted both at the University of Leicester and at MIRA Ltd. The particular focus of these trials will be to determine the extent to which the use of this approach can improve the reliability of TTCS embedded systems.

Distributed Fault-Tolerant Software Architectures for X-by-Wire

Tim Edwards (University of Leicester)
Pete Scotson (TRW Conekt)
Steve Crumpler (TRW Conekt)
Michael Pont (University of Leicester)

Funded by: EPSRC and TRW Conekt

September 2002 - August 2005.

This project is exploring a range of different software architectures that may be used to implement distributed, fault-tolerant, X-by-Wire control systems. The main effort of the project is being devoted to the development of a range of desktop demonstrator systems with different network topologies and code structures. Various cost-effective ways of achieving system redundancy are being examined, includes techniques for migrating essential processing to a different node in the event of a hardware failure. The response of each demonstrator to a range of (injected) system faults is also being rigorously assessed: here, the studies include an examination of the response (and the speed of response) to various node and network failures.

A Simulator to Support the Design of X-by-Wire Networks

Devaraj Ayavoo (University of Leicester)
Stephen Parker (Pi Technology)
Mike Ellims (Pi Technology)
Michael Pont (University of Leicester)

Funded by: CVCP (ORS Award to DA) and Pi Technology Ltd

September 2002 - August 2005.

Networks of embedded processors have been used for several years in "fly-by-wire" systems in aircraft.

There is now increasing interest in the development of "brake-by-wire", "steer-by-wire" and related systems, for use in passenger cars and other road vehicles. Use of such automotive "x-by-wire" networks has the potential to improve safety, vehicle performance and passenger comfort. However, the designers of these networks face the challenge that the resulting systems must operate very reliably, and - at the same time - have minimal maintenance requirements and a low purchase price.

The aim of this research project is to develop a computer simulation which will support the design of reliable, cost-effective, x-by-wire networks by allowing different network designs to be rapidly assessed, and their features compared, early in the product lifecycle.

Patterns for time-triggered embedded systems

Michael Pont, Royan Ong, Mark Banner, William Peasgood, Chimnay Parikh, Yuhua Li

In this area, most theoretical studies suggest that embedded systems implemented using time-triggered, co-operatively scheduled (TTCS) software architectures have more predictable behaviour than those implemented using alternative architectures (such as those which are event-triggered and / or pre-emptively scheduled). Despite this (pure) TTCS architectures have not been widely used because - while the final system is simple and reliable - the creation of TTCS designs is generally thought to be a complex and time-consuming process.

In 1996, we began to work on a design approach which was intended to facilitate the development of TTCS software for reliable embedded systems. Our research in this area was originally motivated by the work of Christopher Alexander and his colleagues. Alexander is an architect who first described what he called "a pattern language" relating various architectural problems in buildings to good design solutions (Alexander, C., "The Timeless Way of Building", Oxford University Press, 1979). While it may appear that the fields of building architecture and embedded systems have little in common, Alexander's approach has, at heart, some powerful and widely-applicable ideas. In particular, his patterns are intended to enforce a coherence in complex building designs, something which Alexander calls a "quality without a name". In adapting Alexander's techniques for use with resource-constrained embedded systems, our aim was to try and ensure that the resulting (software) designs were similarly coherent, and that predictable system behaviour became an "emergent property" of the design process.

The outcome of this programme of research was a substantial pattern language (described in full in Pont, M.J., "Patterns for Time-Triggered Embedded Systems", Addison-Wesley, 2001). This pattern language has been shown to allow high-predictable TTCS architectures to be applied in a wide range of embedded projects, even where there are very severe resources constraints.

Work on this project is continuing, and a new set of patterns was presented and discussed at VikingPLoP in 2002.

Related publications

Author: S A Key, last updated 16/11/2004. Best viewed on 1024 x 768.
This document has been approved by the Head of Department.